Transforming VLSI & ASIC Design industry
Yogesh Soni is a distinguished technology leader with over three decades of experience in semiconductor and chip design and development. An Honors graduate in Electronics and Communication Engineering (ECE), his career reflects deep technical expertise, professional integrity, and a sustained commitment to innovation in advanced technologies.
He began his professional journey as an engineer at C-DOT, New Delhi, contributing to telecommunications systems. From there, he catapulted towards multiple companies across many domains, contributing towards many projects and domains in ASIC design. He now serves as a Technical Director at MaxLinear Technologies, where he leads chip design initiatives for 5G and PON solutions. Chip architecture and design have been his core passion throughout his career. He has played a pivotal role in delivering multiple ASIC and semiconductor IP designs, many of which power products successfully deployed in the market.
Mr. Soni has collaborated with global cross-functional teams and has been instrumental in achieving several first-pass silicon successes,demonstrating his ability to handle complex designs and drive execution excellence.
His domain expertise spans storage systems, communications, networking, multimedia, wearable SoCs, networking fabric chips, PON gateway ASICs, and 5G wireless technologies. He also maintains a strong interest in emerging and disruptive fields such as AI/ML, drones, and robotics.
As a mentor and technology leader, he has guided numerous engineers in ASIC design and development. His professional journey exemplifies innovation, technical excellence, and leadership, contributing meaningfully to the vision of a technologically advanced “New India.”
